Difference between revisions of "Reconfigurable Computing"
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(New page: *[http://en.wikipedia.org/wiki/Reconfigurable_computing Reconfigurable Computing on Wikipedia]) |
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*[http://en.wikipedia.org/wiki/Reconfigurable_computing Reconfigurable Computing on Wikipedia] | *[http://en.wikipedia.org/wiki/Reconfigurable_computing Reconfigurable Computing on Wikipedia] | ||
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| + | == Papers == | ||
| + | *R. Tessier and W. Burleson, "Reconfigurable Computing and Digital Signal Processing: Past, Present, and Future", [http://site.ebrary.com.ezproxy1.lib.asu.edu/lib/asulib/Doc?id=10051293 ''Programmable Digital Signal Processors'' (online via ASU Library), Yu Wen Hu, ed., Marcel Dekker, New York, N.Y., 2002. | ||
| + | *R. Tessier and W. Burleson, [http://www.ecs.umass.edu/ece/tessier/jvsp00.pdf "Reconfigurable Computing and Digital Signal Processing: A Survey", Journal of VLSI Signal Processing, May/June 2001, pp. 7-27 | ||
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| + | === Adaptive Algorithm for Hardware Reconfiguration === | ||
| + | *Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne Burleson, [http://www.ecs.umass.edu/ece/tessier/tvlsi-ava.pdf "A Reconfigurable, Power-Efficient Adaptive Viterbi Decoder", IEEE Transactions on VLSI Systems, vol. 13, no. 4, April 2005, pp. 484-488 | ||
Revision as of 13:46, 14 January 2008
Papers
- R. Tessier and W. Burleson, "Reconfigurable Computing and Digital Signal Processing: Past, Present, and Future", [http://site.ebrary.com.ezproxy1.lib.asu.edu/lib/asulib/Doc?id=10051293 Programmable Digital Signal Processors (online via ASU Library), Yu Wen Hu, ed., Marcel Dekker, New York, N.Y., 2002.
- R. Tessier and W. Burleson, [http://www.ecs.umass.edu/ece/tessier/jvsp00.pdf "Reconfigurable Computing and Digital Signal Processing: A Survey", Journal of VLSI Signal Processing, May/June 2001, pp. 7-27
Adaptive Algorithm for Hardware Reconfiguration
- Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne Burleson, [http://www.ecs.umass.edu/ece/tessier/tvlsi-ava.pdf "A Reconfigurable, Power-Efficient Adaptive Viterbi Decoder", IEEE Transactions on VLSI Systems, vol. 13, no. 4, April 2005, pp. 484-488
