Difference between revisions of "Code Overlay"

Revision as of 23:24, 1 November 2009

• (10.15) Amit Pabalkar, Aviral Shrivastava, Arun Kannan and Jongeun Lee. SDRM: Simultaneous Determination of Regions and Function-to-Region Mapping for Scratchpad Memories. High Performance Computing - HiPC 2008. Springer Berlin / Heidelberg. Volume Volume 5374/2008. Wednesday, December 17, 2008

• (10.14) Power Architecture editors (dwpower@us.ibm.com), An introduction to compiling for the Cell Broadband Engine architecture, Part 5: Managing memory Analyzing calling frequencies for maximum SPE partitioning optimization. developerWorks, IBM 07 Feb 2006

-"Call-graph partitioning faces challenges with very large single functions. Such functions are generally the result of aggressive optimizations, particularly function inlining and loop unrolling."

• (10.1) M. Verma, P. Marwedel. Overlay techniques for scratchpad memories in low power embedded processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Aug. 2006 Volume: 14, Issue: 8 On page(s): 802-815

-University of Dortmund, Computer Science 12, 44221 Dortmund, Germany

• (10.11) Sumesh Udayakumaran and Angel Dominguez and Rajeev Barua. Dynamic allocation for scratch-pad memory using compile-time decisions. ACM Transactions on Embedded Computing Systems (TECS). Volume 5 , Issue 2 Pages: 472 - 511. May 2006

-University of Maryland, College Park, MD

• (10.2) Bernhard Egger and Chihun Kim and Choonki Jang and Yoonsung Nam and Jaejin Lee and Sang Lyul Min. A dynamic code placement technique for scratchpad memory using postpass optimization. International Conference on Compilers, Architecture and Synthesis for Embedded Systems. Pages: 223 - 233. 2006.

-Seoul National University, Seoul, Korea

• (10.3) Federico Angiolini and Francesco Menichelli and Alberto Ferrero and Luca Benini and Mauro Olivieri. A post-compiler approach to scratchpad mapping of code. International Conference on Compilers, Architecture and Synthesis for Embedded Systems. Pages: 259 - 267. 2004.

-Università di Bologna, Bologna, Italy

• (10.7) Federico Angiolini and Luca Benini and Alberto Caprara. Polynomial-time algorithm for on-chip scratchpad memory partitioning. International Conference on Compilers, Architecture and Synthesis for Embedded Systems. Pages: 318 - 326. 2003.

-University of Bologna, Bologna, Bologna, Italy

• (10.4) Manish Verma and Lars Wehmeyer and Peter Marwedel. Cache-Aware Scratchpad Allocation Algorithm. Design, Automation, and Test in Europe. Page: 21264. 2004.

-University of Dortmund, Computer Science 12, 44221 Dortmund, Germany

• (10.5) S. Steinke and L. Wehmeyer and B. Lee and P. Marwedel. Assigning Program and Data Objects to Scratchpad for Energy Reduction. Design, Automation, and Test in Europe. Page 409. 2002.

-University of Dortmund, Computer Science 12, 44221 Dortmund, Germany

• (10.6) Oren Avissar and Rajeev Barua and Dave Stewart. An optimal memory allocation scheme for scratch-pad-based embedded systems. ACM Transactions on Embedded Computing Systems (TECS). Volume 1, Issue 1. Pages: 6 - 26. November 2002.

-University of Maryland, College Park, MD

• M. Kandemir and J. Ramanujam and M.J. Irwin and N. Vijaykrishnan and I. Kadayif, A. Parikh. Dynamic management of scratch-pad memory space. Design Automation Conference. page(s): 690- 695. 2001.

-Microsyst. Design Lab., Pennsylvania State Univ., University Park, PA, USA;

• (10.12) Lian Li and Lin Gao and Jingling Xue. Memory coloring: a compiler approach for scratchpad memory management. Parallel Architectures and Compilation Techniques. page(s): 329-338. September 2005.

-Sch. of Comput. Sci. & Eng., New South Wales Univ., Sydney, NSW, Australia;

Dynamic Code Mapping

• (10.13) Bernhard Egger and Jaejin Lee and Heonshik Shin. Scratchpad memory management for portable systems with a memory management unit. International Conference On Embedded Software. Pages: 321 - 330. 2006.

-Seoul National University, Korea

• (10.8) Andhi Janapsatya and Aleksandar Ignjatović and Sri Parameswaran A novel instruction scratchpad memory optimization method based on concomitance metric. Asia and South Pacific Design Automation Conference. Pages: 612 - 617. 2006.

-The University of New South Wales, Sydney, Australia

• (10.9) Stefan Steinke and Nils Grunwald and Lars Wehmeyer and Rajeshwari Banakar and M. Balakrishnan and Peter Marwedel Reducing energy consumption by dynamic copying of instructions onto onchip memory. International Symposium on Systems Synthesis. Pages: 213 - 218. 2002.

-University of Dortmund, 44221 Dortmund, Germany

• (10.10) Manish Verma and Lars Wehmeyer and Peter Marwedel. Dynamic overlay of scratchpad memory for energy minimization. International Conference on Hardware Software Codesign. Pages: 104 - 109. 2004.

-University of Dortmund, Dortmund, Germany

Segment Prefetching

• Branch target prediction, should be similar to what we want to accomplish as opposed to branch prediction

IBM CBE Compilers (xlc/gcc)

• Overlay manager source code ovl_spu.S is located in spu-binutils-2.18.50-21.src.rpm: ld/emultempl/spu_ovl.S
• switches for automatic overlay generation

--auto-overlay=link.script outputs the generated overlay as a linker script and halts

• Using the GNU SPU linker for overlays
• Overlay manager source code
• Overlay manager source code, different comments
• Overlay manager source code, another version
• elf32-spu.c

Last printed: 10.15