Difference between revisions of "Cell Broadband Engine"
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* [http://researchweb.watson.ibm.com/journal/rd/515/flachs.pdf Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI] | * [http://researchweb.watson.ibm.com/journal/rd/515/flachs.pdf Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI] | ||
| − | '''CELL SDK''' | + | === '''CELL SDK''' === |
*[http://www.ibm.com/developerworks/power/library/pa-celldebug/ Debugging Cell Broadband Engine systems Essential tools and techniques for the Cell BE software developer] | *[http://www.ibm.com/developerworks/power/library/pa-celldebug/ Debugging Cell Broadband Engine systems Essential tools and techniques for the Cell BE software developer] | ||
*[http://www.cellperformance.com/articles/2006/06/a_4x4_matrix_inverse_1.html Matrix Inverse Application] | *[http://www.cellperformance.com/articles/2006/06/a_4x4_matrix_inverse_1.html Matrix Inverse Application] | ||
Revision as of 21:57, 11 September 2007
Contents
IBM
Software
Hardware
Articles
General/Architecture
- > (2.1) D.C. Pham, T. Aipperspach, D. Boerstler, M. Bolliger, R. Chaudhry, D. Cox, P. Harvey, P.M. Harvey, H.P. Hofstee, C. Johns, J. Kahle, A. Kameyama, J. Keaty, Y. Masubuchi, M. Pham, J. Pille, S. Posluszny, M. Riley, D.L. Stasiak, M. Suzuoki, O. Takahashi, J. Warnock, S. Weitzel, D. Wendel, K. Yazawa, "Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor", Technol. Group, IBM Syst., Austin, TX, USA, IEEE Journal of Solid-State Circuits, Volume: 41 , Issue: 1, pp. 179-196, Jan. 2006 (originally forwarded by Dr. Chatha)
- CODES+ISSS 2007 Tutorial summary on Cell Processor
- Kahle, J., "The Cell Processor Architecture", IBM, MICRO-38. 38th Annual IEEE/ACM International Symposium on Microarchitecture, 12-16 Nov. 2005
- M. Day, P. Hofstee, "Hardware and software architectures for the CELL processor", IBM Systems&Technology Group, Austin, TX, Hardware/Software Codesign and System Synthesis, CODES+ISSS, Sept. 2005
- D. Stasiak, R. Chaudhry, D. Cox, S. Posluszny, J. Warnock, S. Weitzel, D. Wendel, M. Wang, "Cell processor low-power design methodology" Syst. & Technol. Group, IBM Corp., Austin, TX, USA, Micro, IEEE, Volume: 25 , Issue: 6 pp. 71-78, Nov.-Dec. 2005
- Tom Krazit, "IBM, Sony, Toshiba Unveil Nine-Core Cell Processor", IDG News Service, February 07, 2005
- -"Cell will probably consume around 30 watts of power, similar to the Emotion Engine processor in the PlayStation 2"
- A. E. Eichenberger, K. O’Brien, K. O’Brien, P. Wu, T. Chen, Pe. H. Oden, D. A. Prener, J. C. Shepherd, B. So, Z. Sura, A. Wang, T. Zhang, P. Zhao, M. Gschwind, "Optimizing Compiler for a CELL Processor", Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques, 2005
High Performance Computing Application
- > (2.2) [A. Buttari, P. Luszczek, J. Kurzak, J. Dongarra, G. Bosilca, http://www.netlib.org/utk/people/JackDongarra/PAPERS/scop3.pdf "A Rough Guide to Scientific Computing On the PlayStation 3"], Technical Report UT-CS-07-595, Innovative Computing Laboratory, University of Tennessee Knoxville, May 11, 2007
- "Researchers Analyze HPC Potential of Cell Processor", HPC Wire, May 2006
- -S. Williams, J. Shalf, L. Oliker, S. Kamil, P. Husbands, K. Yelick, "The Potential of the Cell Processor for Scientific Computing", ACM, May 2006
- On the Design and Analysis of Irregular Algorithms on the Cell Processor: A Case Study of List Ranking
- Programming high-performance applications on the Cell BE processor, Part 1: An introduction to Linux on the PLAYSTATION 3
- Programming high-performance applications on the Cell BE processor, Part 2: Program the synergistic processing elements of the Sony PLAYSTATION 3
- Programming high-performance applications on the Cell BE processor, Part 3: Meet the synergistic processing unit
- Programming high-performance applications on the Cell BE processor, Part 4: Program the SPU for performance
- Programming high-performance applications on the Cell BE processor, Part 5: Programming the SPU in C/C++
- Programming high-performance applications on the Cell/B.E. processor, Part 6: Smart buffer management with DMA transfers
Media Application
- (2.3) L. Liu, Q. Liu, A. Natsev, K. A. Ross, J. R. Smith, A. L. Varbanescu, "Digital Media Indexing on the Cell Processor", ICME, 2007
- The Cell BE Processor: A Broadband Engine for Broadcast Applications
- Digital Media Applications on A CELL Software Platform
Real Time Application
- S. Maeda, S. Asano, T. Shimada, K. Awazu, H. Tago, "A real-time software platform for the Cell processor", Toshiba Corp., Japan, Micro, IEEE, Volume: 25 , Issue: 5, pp. 20-29, Sept.-Oct. 2005
- Seiji Maeda, Sigehiro Asano, Tomofumi Shimada, Koichi Awazu, Haruyuki Tago, "A Real-Time Software Platform for the Cell Processor", IEEE, 2005
Other Applications
- Scientific Computing Kernels on the Cell Processor
- Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI
CELL SDK
- Debugging Cell Broadband Engine systems Essential tools and techniques for the Cell BE software developer
- Matrix Inverse Application
- MPI microtask for programming the Cell Broadband Engine processor
- A Programming Example: Large FFT on the Cell Broadband Engine
Last printed: 2.3
