Difference between revisions of "EEE525 VLSI Design"
From esoterum.org
| Line 12: | Line 12: | ||
*[http://bwrc.eecs.berkeley.edu/classes/icdesign/ee141_s04/CadenceLabs/Lab2/VirtuosoTutorial.htm Berkeley Virtuoso tutorial] | *[http://bwrc.eecs.berkeley.edu/classes/icdesign/ee141_s04/CadenceLabs/Lab2/VirtuosoTutorial.htm Berkeley Virtuoso tutorial] | ||
*[http://trinity.senecac.on.ca/ Cadence FAQ] | *[http://trinity.senecac.on.ca/ Cadence FAQ] | ||
| + | *[http://www.tec.ufl.edu/~isj/verification.html#novddorgnd NCSU CDK User FAQ] | ||
*[http://www.utdallas.edu/~liuhao/paper/Circuit%20Simulation%20using%20Spectre.pdf Circuit simulation using Spectre] (UT Dallas) | *[http://www.utdallas.edu/~liuhao/paper/Circuit%20Simulation%20using%20Spectre.pdf Circuit simulation using Spectre] (UT Dallas) | ||
=== Design Rules === | === Design Rules === | ||
*[http://www.mosis.com/Technical/Designrules/scmos/scmos-main.html#tech-codes Mosis design rules] ([http://www.mosis.com/Technical/Layermaps/lm-scmos_scn5m.html SCN5M Deep]) | *[http://www.mosis.com/Technical/Designrules/scmos/scmos-main.html#tech-codes Mosis design rules] ([http://www.mosis.com/Technical/Layermaps/lm-scmos_scn5m.html SCN5M Deep]) | ||
Revision as of 15:06, 31 January 2008
Cadence
- Configuration path:
/usr/local/cadence2/NCSU
- vlsi2.eas.asu.edu information
- VLSI Readme, with Cadence instructions
- > vlsi2 Read-me file
Tutorials
- > Tutorial at WPI
- Tutorial, VLSI
- Tutorial on Virtuoso Schematic editor from OSU, layout with ALU
- Berkeley Virtuoso tutorial
- Cadence FAQ
- NCSU CDK User FAQ
- Circuit simulation using Spectre (UT Dallas)
