CSE591 Low Power Architecture
From esoterum.org
Contents
29 Jan 07 Presentation I
Instruction Level Power Dissipation in the Intel XScale Embedded Microprocessor
Tools for power analysis of microprocessors at the microarchitectural level:
- This software is based on the SimpleScalar software
- Download Wattch
5 Feb 07 Project I Topic due
12 Feb 07 Project I due
Simulation Software
DVFS Project Resources
- Concise references for DVFS project from 2003 using speedstep on an IBM Thinkpad
- Good linux kernel reference
Project II
- XScale project using
PXA25080200 already in Dr. Shrivastava's possession.
19 Feb 07 Presentation II
- -Energy Efficient Co-Adaptive Instruction Fetch and Issue (Throttling paper)
- -Instruction Flow-Based Front-end Throttling for Power-Aware High-Performance Processors (Throttling paper)
- Amdahl's Law (Wikipedia)
- Intel article on EPI throttling
- Best of Both Latency and Throughput (introduces EPI Throttling)
Vocabulary
Project I Take II
Considerations:
- Power use of the LCD vs. the Electrophoretic Display (EPD)
- Existing power reduction schemes for LCDs and thier applicability to EPDs
- Dynamic Backlight and Contrast Scaling
- The advantages of bi-stability of EPD over constant refresh of LCD
- Possibility of redraw circuitry for bi-stable display which only addressed pixels which need to be updated
- Relevance of the backlight in LCD in comparison with "front-light" in EPD
- Best-case/Worst-case for each display and in what circumstances are they opposed, in what circumstances are they matched
- Power Modeling for LCD and EPD
- Traditionally pixel switching has been ignored because it is insignificant compared to backlight and control circuitry, is the EPD a different case
- LCD switching power modelled as capacitors (1.16, 1.5, 1.10)
- EPD switching power modelled as resistor (Display Technology#Electrophroetic Displays|1.12]]
